1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same and, more particularly, to a ferroelectric film capacitor cell structure.
2. Description of the Related Art
In a capacitor cell having the conventional COP structure, a gate including a gate oxide film, gate electrode, and gate sidewall/cap SiN film is formed on a silicon (Si) substrate having an active region.
In addition, a contact hole is formed in an insulating film surrounding the gate and planarized and in a multilayer interlayer film formed on the insulating film. A poly-Si plug and W plug (and a barrier layer) are formed in this contact hole to connect the active region and a lower electrode of the capacitor via the barrier layer.
The barrier layer and capacitor lower electrode are so formed as to connect to this W plug. Furthermore, a capacitor insulating film as a ferroelectric material and a capacitor upper electrode are formed on the capacitor lower electrode.
Then, an interlayer dielectric film is formed to surround the capacitor. A contact and interconnection are so formed as to connect to the capacitor upper electrode through the interlayer dielectric film, and electrically connect TE(Top Electrode)s of adjacent capacitors (a so-called dual damascene structure).
When the interlayer dielectric film is formed to surround the capacitor, a gas mainly containing hydrogen enters the interface between the capacitor insulating film and upper electrode, and inflicts damage such as reduction or decomposition, thereby significantly deteriorating the characteristics.
In the conventional capacitor structure as described above, the influence of the damage described above increases as the degree of integration increases and the cell size reduces. This poses the problem that a signal amount required to operate the device cannot be obtained.
Note that Jpn. Pat. Appln. KOKAI Publication No. 2000-349246 discloses a structure in which an upper electrode includes an upper electrode layer, a conductive oxide layer (SrRuO3) formed on the upper electrode layer and having a perovskite structure, and a metal layer (including Pt, Ir, Ru, or the like) formed on the conductive oxide layer.
Jpn. Pat. Appln. KOKAI Publication No. 11-233734 discloses a capacitor structure in which Ir is formed on a TaxSi1-xNy or HfxSi1-xNy diffusion barrier layer, and an IrO2 film and dielectric film are stacked after annealing.
Jpn. Pat. Appln. KOKAI Publication No. 2003-174146 discloses a capacitor electrode structure in which one of a first oxide upper electrode and second oxide upper electrode in contact with the upper surface of a dielectric layer contains SRO, and the other contains IrOx.
U.S. Pat. No. 6,649,954 discloses a structure in which a ferroelectric capacitor has a lower electrode, an oxide ferroelectric layer formed on the lower electrode, a first oxide upper electrode formed in contact with the upper surface of the oxide ferroelectric layer, and a second oxide upper electrode formed on the first oxide upper electrode, one of the first and second oxide upper electrodes contains SRO which contains 0.1 at % or more of an additive, and the other contains IrOx.